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Verification IP
test and verify SoC's protocols and interface buses.
- Pickering Interfaces Inc.
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PXI 32 Chan I/O Parallel I/P Prog Threshold
40-412-111
A 32-channel Digital I/O module with high output voltage and currentcapability and a dual variable threshold input. Each of the 32 channel outputs can be used to drive the output high or low usinga high current capacity drive capable of sourcing 0.4A from the high side or 0.5Asink on the low side for each channel. The module is available in two versions witheither serial or parallel capture of the input levels.
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EMBEDDED MMC (EMMC)
SD 3.0 / eMMC 4.51 IP Family
The eMMC Host IP is an RTL design in Verilog that implements an MMC / eMMC host controller in an ASIC or FPGA. The core includes RTL code, test scripts and a test environment for full simulation verifications. The Arasan MMC / eMMC Host IP Core has been widely used in different MMC applications by major semiconductor vendors with proven silicon.
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Waterproof Test Chamber
JL-XC
JL-XC series waterproof test chamber is mainly used for small electronic and electrical products. Such as lamps, electrical cabinets, electrical components and so one. The products are tested for physical and other related properties under simulated climatic conditions. After the test, it is judged whether the performance of the product meets the requirements by verification, so as to be used in the design, improvement, verification and factory inspection of the product. Comply with IEC60529:2001 《Degrees of protection provided by enclosures (IP Code)》, GB4208-2008 《Shell Protection Grade (IP Code)》 14.2.8 Terms and GB7000.1 《Lamps Part 1: General Requirements and Tests》 9.2.9 Terms.
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Field Ttesters
Our product range comprises from small handheld, battery fed testers to full featured service performance assurance tools and distributed monitoring systems. We have several product lines including:QoS / SLA verification system Ethernet, IP, Critical Data, VoIP, IPTV .Hand-held testers: Gigabit Ethernet, Synchronous Ethernet, E1, PDH, SDH, Ethernet, IP, Jitter, Wander, Datacom, Frame Relay, etc.
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Ethernet Testing Network Performance
Networked Communication Solutions, LLC
Xena Networks and Veryx Technologies have created an innovative Ethernet test platform that combines Xena’s high performance, wire-speed Ethernet test hardware with Veryx’s broad portfolio of IP & Ethernet functional and conformance test suites. The result: an affordable, high-performance platform for IP & Ethernet load stress, protocol conformance & functional verification testing.
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IP Reuse
IC Manage Global Design Platform (GDP & GDP-XL) includes an open platform for maximizing IP reuse. Design and verification teams can use the system to rapidly publish and integrate IP into existing flows, and to trace bug dependencies. Internal and third party IP can be imported or linked with IP Central from multiple commercial and open source design management systems, as well as internal revision control systems. ”
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Emulation Platform
Veloce
The Veloce® Emulation Platform dramatically reduces risk in the verification of today’s complex SoCs and is a core technology in the Mentor Enterprise Verification Platform™ (EVP). Mentor’s software and application solutions and continual enhancements enable a comprehensive verification environment for IP, chip, and system level verification.
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MIPI Soundwire Total IP Solutions
Soundwire
Soundwire is suited for small, cost-sensitive audio peripherals such as modern digital class-D amplifiers and digital microphones. The Total MIPI SoundWire IP Solution from Arasan enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package that includes the Verilog RTL source code for Master and Slave, fully validated for compliance with the standard, a comprehensive test environment with a compliance suite for verification of the IP package, a SoundWire Hardware Development Kit (“HDK”) for FPGA prototyping, a SoundWire protocol analyzer and a complete SoundWire software stack.
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MIPI Total Display IP Solution
DSI
The Arasan MIPI Display Serial Interface (DSI) Controller IP provides both device and host functionality. Additionally, the DSI Controller provides a high-speed serial interface between an application processor and display and follows a rigorous verification methodology to ensure interoperability of our DSI digital controller with our D-PHY analog IP. Arasan’s DSI solutions are MIPI standards-compliant and are designed to accelerate integration, lower risk and accelerate time to market for developers of display applications. Arasan’s expertise is backed by our unique silicon proven design discipline and product development process that ensures fast silicon success with our analog and digital IP.
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ADSL / 2 / 2+ Handheld VoIP Tester
QuickTest 500
*Rapid Testing. The QuickTest 500 ADSL2+ Tester's automatic Service Verification Test Suite starts as soon as you switch on (results are typically obtained in less than 3 minutes)*Simple to use. Virtually no product training required with QuickTest 500 ADSL Tester*Configurable Pass / Fail Indicators on the LCD display and clearly presented in multi-colour LEDs on the front panel*No need to get a laptop out*Save and name up to 16 test results at any one time*Line Voltage LED indicates poor, missing or excessive Line Voltage*ADSL/2/2+ Test LEDs to indicate if ADSL Showtime achieved*In Service LED indicates problems with PPP or IP layer*LEDs to indicate problems with the Trained Line Rate, poor Noise Margin or excessive Line Attenuation
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Analyze RTL
ASICs and FPGA routinely have millions of gates with memories, transceivers, third party IP and processor cores. Problems can be time consuming and complex to debug in the lab and through simulations. Designers need verification tools that can identify problems quickly to reduce their verification and debug time before simulation, before synthesis, and definitely before burning chips in the lab.
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Torque Verification
90229
SDI’s 90229 is designed for calibrating tools used to apply torque including electric and pneumatic power tools, torque sensors, hand and click wrenches. The strain gage based reaction torque sensors in the bench-mount housing remain stationary while torque is applied. The housing dis-assembles by removing two snap pins, allowing the user to easily change socket sizes and capacities.
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FPGA Verification
The market is changing and rapidly expanding for FPGAs. Advancements in higher design frequency, embedded system FPGAs, and lower power consumption, combined with the reprogrammable advantages of FPGAs are increasing adoption into applications that have typically been enabled with ASSP/SoCs, including AI/ML, 5G, crypto, data center and high-performance computing applications.
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Controller IP
ONFI – NAND
Continuous leadership in standards development and extensive customer adoption of previous versions ensures that Arasan has the knowledge and expertise to deliver compliant products with superior customer support. Extensive experience and compliance testing with all versions of ONFI specifications make the choice of Arasan ONFI NAND flash controller the lowest risk approach to implementation of ONFI enabled products. Arasan’s development engineering team provides direct support to customers ensuring that the highest level of knowledge is immediately available to the customer thus reducing problem resolution time.
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Barcode Verification Systems
REA PC-Scan LD4
The REA PC-Scan LD4 is a barcode verifier made in Germany which was developed in conformity with international standards. It is especially designed for measuring barcodes with highest precision. The combination of state-of-the-art technology, process reliability and intuitive operation makes the REA PC-Scan LD4 globally unique in its class. Final statements "Pass" or "Fail" are central display elements and enable an immediate result. The simultaneously displayed details allow for an immediate and exact barcode quality analysis.
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CPE Design Verification System
Jupiter 310
Jupiter is the industry standard for automated DOCSIS physical (PHY) layer testing. It provides the most comprehensive test coverage and accurate results on the market for DOCSIS 3.1 devices.
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Arasan PHY IP
Arasan PHY’s are readily available and in production with multiple foundries from 16nm to 180nm. Our PHY’s are designed for low power on the most advanced nodes for the mobile market while also targeting the automobile market on specialized nodes where extreme temperature tolerance is required.
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IP QAM
SHP200D
Hangzhou Softel Optic Co., Ltd.
SHP200D 10G IP QAM processor is an all-in-one device developed by SOFTEL which integrates multiplexer, scrambler and modulator in one body with maximum 112 DVB-C QAM channels output. With 10G switch built in, it can process 10G optical signal to work as a traditional QAM modulator. This processor is equipped with 2 card slots to load 32ch or 48ch or 64ch QAM card. Its high density helps operators to save cost to the most extent.
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IP Gateway
3507Rx
Hangzhou Softel Optic Co., Ltd.
SFT3507Rx IP to ASI Gigabits gateway is a head-end interface device which is used for DVB ASI and Ethernet . As a kind of IP receiver, this device can recover UDP database received from the transporting device into TS stream and then output it through the ASI output interfaces. Moreover, it has the function to resist the IP transporting jitter, and to restore the PCR of the TS stream. This device can maximum receive 12 channel IP and output 12 ASI, also, it can simultaneously transmit the 12 IP stream into 12 TS stream.
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USB Protocol Verification System
Voyager M310e
The Voyager M310e is Teledyne LeCroy's flagship USB protocol verification system designed for USB 2.0, USB 3.2, Type-C, and USB Power Delivery. Offering the industry's highest fidelity probe design, flexible traffic generation, and a range of turnkey Compliance packages, the Voyager M310e is the most complete platform for cradle-to-grave USB design verification.
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X-Design and Verification System
Ascent XV
The Ascent X-design and verification system (XV) prevents, detects and isolates issues caused by the propagation of unknowns (‘Xs’) in RTL designs, including Xs that occur during power-on initialization and switching between power modes. Early sign-off of X issues eliminates costly, painful gate-level debug, and prevents hidden functional bugs from slipping through to silicon.
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Real-time IP network measurements
IPProbe
Real-time network measurements for multiple IP interfaces. Detection of Packet loss, IAT (Inter Arrival Time), Delay, Bitrate and ETR290 problems. Stable packet generation and receiving is a key feature required in any modern IPTV environment. Any irregularity and/or discontinuity in this packet stream means buffering problems or losing frames. IP jitter provides a means to see the distribution and stability in the IP stream.
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Multi-channel IP Receiver
WDJS-3
WDJS-3 is the latest time-domain induced polarization receiver, working with short lead wire. In operation, a WDFZ-5T or WDFZ-10T series high-power intelligent transmitter may be the power source and several receivers could work simultaneously; what's more, the receiver can measure with several channels, which multiples the working efficiency.
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EBIRST 200-pin LFH Verification Fixture
93-002-101
The 93-002-101 200-pin LFH Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions.. The tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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ARINC 818-2 IP Core
iWave’s ARINC IP core is ARINC 818–2 compliant offering point-to-point, high-speed, low latency video transmission. This IP core can be implemented on any transceiver-based FPGA device. It can be used for both transmit and receive applications. This core supports configurable ADVB video formats and uses a simple streaming interface to interface with video & image processing IP cores supported by FPGA vendors.
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IP Gateway
SFT3503A
Hangzhou Softel Optic Co., Ltd.
SFT3503A Bidirectional IP Gateway is a head-end interface device which is used for DVB and Ethernet. It can be used both for a receiver and a lancers! On one hand, in the lancers part, this machine can be used for sending IP stream, turning the TS stream into IP Stream. On the other hand, in the receive part; this machine can be used for receiving IP stream, turning the IP stream into TS stream.
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Design Verification Editor Checker for SV/UVM
DVinsight
DVinsight-Pro is a Integrated Development Environment (IDE) for creation of Universal Verification Methodology (UVM) based System Verilog (SV) Design Verification (DV) code. Design & Verification Engineers can create correct by construction DV code because DVinsight-Pro is a design verification editor checker that provides helpful insight into user code and ensures compliance with UVM best practices while adhering to established standards.
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IP and NEMA Ingress Testing
Environment Associates offers dust, water and solid ingress protection testing to multiple specifications including EN/IEC 60529 and NEMA 250 for electronics enclosures, SAE standards for automotive components, RTCA DO-160 for commercial aircraft and various MIL standards for associated military hardware.
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SoC Signoff & Structural Verification
Defacto’s STAR augments existing RTL verification flows by providing fully automated structural checks. Users can also define and build their custom checks.
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IP to Dual RS-232 Controller
VSA-31-IP
The VSA-31-IP is an add-on module for the Switch-Cat A/V Systems. The new IP module allows monitoring and control of one to multiple Switch-Cat installations via IP across the customers internal network.
